Optimizing the thickness of Ta2O5 interfacial barrier layer to limit the oxidization of Ta ohmic interface and ZrO2 switching layer for multilevel data storage

doi:10.1016/j.jmst.2021.08.012

Abstract

Abstract:

The multilevel storage capability of nonvolatile resistive random access memory (ReRAM) is greatly desired to accomplish high functioning memory density. In this study, Ta₂O₅ thin film with different thicknesses (2, 4, and 6 nm) was exploited as an appropriate interfacial barrier layer for limiting the formation of the interfacial layer between the 10 nm thick sputtering deposited resistive switching (RS) layer and Ta ohmic electrode to improve the switching cycle endurance and uniformity. Results show that lower forming voltage, narrow distribution of SET-voltages, good dc switching cycles (10³), high pulse endurance (10⁶ cycles), long retention time (10⁴ s at room temperature and 100°C), and reliable multilevel resistance states were obtained at an appropriate thickness of -2 nm Ta₂O₅ interfacial barrier layer instead of without Ta₂O₅ and with -4 nm, and -6 nm Ta₂O₅ barrier layer, ZrO₂-based memristive devices. Besides, multilevel resistance states have been scientifically investigated via modulating the compliance current (CC) and RESET-stop voltages, which displays that all of the resistance states were distinct and stayed stable without any considerable deprivation over 10⁴ s retention time and 10⁴ pulse endurance cycles. The I-V characteristics of RESET-stop voltage (from -1.7 to -2.3 V) of HRS are found to be a good linear fit with the Schottky equation. It can be seen that Schottky barrier height rises by increasing the stop-voltage during RESET-operation, resulting in enhancing the data storage memory window (on/off ratio). Moreover, RESET-voltage and CC control of HRS and LRS revealed the physical origin of the RS mechanism, which entails the formation and rupture of conducting nanofilaments. It is thoroughly investigated that proper optimization of the barrier layer at the ohmic interface and the switching layer is essential in memristive devices. These results demonstrate that the ZrO₂-based memristive device with an optimized -2 nm Ta₂O₅ barrier layer is a promising candidate for multilevel data storage memory applications.

Key words: Resistive switching, Ta₂O₅/ZrO₂ bilayer film, Barrier layer thickness, Multilevel resistance states, RESET-stop voltage

Muhammad Ismail, Haider Abbas, Chandreswar Mahata, Changhwan Choi, Sungjun Kim. Optimizing the thickness of Ta₂O₅ interfacial barrier layer to limit the oxidization of Ta ohmic interface and ZrO₂ switching layer for multilevel data storage[J]. J. Mater. Sci. Technol., 2022, 106: 98-107.

Figures/Tables 9

Fig. 1. (a, b) Fabrication process and schematic structure of the Ta/Ta2O5/ZrO2/Pt memristive device by optimizing the thickness of Ta2O5 interfacial barrier layer such as 0, - 2, - 4, - 6 nm, respectively.

Fig. 2. XPS spectra of deconvoluted O 1s peaks of the Ta/Ta2O5/ZrO2/Pt memristor devices for (a) without Ta2O5, (b) with - 2 nm Ta2O5, (c) with - 4 nm Ta2O5 and (d) with/-6 nm Ta2O5, interfacial barrier layer, where OI, OII and OIII represent the oxygen ions, oxygen vacancies (O-deficient), and chemisorbed hydroxide, respectively.

Table 1. The percentage of lattice oxygen, oxygen-vacancy and chemisorbed hydroxide in the Ta/Ta2O5/ZrO2/Pt memristive devices with various thicknesses (0, - 2, - 4 and - 6 nm) of Ta2O5 interfacial barrier layer.

Interfacial barrier layer	Area ratio
Interfacial barrier layer	O_I = oxygen lattice	O_II = oxygen vacancy	O_III = chemisorbed hydroxide
Without Ta₂O₅	80.43%	19.57%	-
With - 2 nm Ta₂O₅	45.45%	27.27%	27.28%
With - 4 nm Ta₂O₅	45.00%	21.25%	33.75%
With - 6 nm Ta₂O₅	55. 74%	19.35%	24.91%

Fig. 3. Typical I-V switching cycles of the Ta/Ta2O5/ZrO2/Pt memristive devices by optimizing the thickness of the Ta2O5 interfacial barrier layer. (a) Without Ta2O5, (b) with - 2 nm Ta2O5, (c) - 4 nm Ta2O5, and (d) - 6 nm Ta2O5. The switching endurance characteristics over 120 loops testing conditions of (e) without Ta2O5, (f) with - 2 nm Ta2O5, (g) - 4 nm Ta2O5, and (h) - 6 nm Ta2O5. Statistical distribution of the SET-voltages of (i) without Ta2O5. (j) with - 2 nm Ta2O5, (k) - 4 nm Ta2O5, and (l) - 6 nm Ta2O5. (m) 1000 DC switching cycles, (n) 106 pulse endurance cycles, and (o, p) retention characteristics of both LRS and HRS at RT and 100 °C of with - 2 nm Ta2O5 interfacial barrier layer, ZrO2-based memristive device.

Table 2. The cycle-to-cycle (C2C) variation characteristic of without and with Ta2O5 (2 nm, 4 nm, and 6 nm) barrier layer, ZrO2-based memristive devices.

Memristive device	Average value, μ	Standard deviation, σ	Relative standard deviation, σ/μ
Without Ta₂O₅	1.12	0.7	0.53
Without 2 nm Ta₂O₅	1.00	0.03	0.03
Without 2 nm Ta₂O₅	1.10	0.33	0.30
Without 2 nm Ta₂O₅	1.64	0.89	0.55

Fig. 4. Switching speeds of the Ta/Ta2O5/ZrO2/Pt memristive devices: (a) one complete cycle of SET- and RESET- process with writing, erasing and read pulses, (b) SET-process demonstrating the writing speed (writing time) and (c) RESET-process displaying the erasing speed of the device.

Fig. 5. (a) Multilevel I-V characteristics of - 2 nm Ta2O5 interfacial barrier layer, ZrO2-based memristive device under the application of various CC (1 mA, 5 mA and 10 mA) on the same device. I-V curves plotted in semi-logarithmic scale presenting the different LRS corresponding to the CC applied. The arrows in the graph indicate the direction of the SET- and RESET-process. (b, c) Dependence of LRS resistance (RLRS) and RESET current (IRESET) on the CC value. (c) RESET current. (d) Effect of SET-CC on SET operating voltage distribution. (e) Reversible multilevel storage states over 300 DC switching cycles, where 100 cycles were repeated at SET-CC of 1 Am, 5 Am and 10 Am, to distinguish the four-level resistance states. (f) Nonvolatile retention performance of four different resistance states over 104 s at RT. (g) High resistance state (HRS) of the memristive device under different CCs are controlled at the same level. (h) Schematic illustration of the multilevel RS operation mechanism with variations of the SET-CC values.

Fig. 6. Multilevel RS characteristics of the Ta/Ta2O5/ZrO2/Pt memristive device. (a) Typical I-V curves obtained by adjusting RESET-stop voltage from -1.7 V to -2.3 V, respectively. Effect of RESET-stop voltage on (b) SET-voltage and (c) HRS resistance. (d) Multilevel storage operation of HRS over 200 DC switching cycles was performed by varying the RESET-stop voltage, where consecutive 50 cycles were repeated at each RESET-stop voltage to check their influence on HRS. (e) The retention characteristics of all five different resistance states, measured up to 104 s, confirming nonvolatile behavior. (f) Pulse endurance up to 105 cycles were repeated by different pulse amplitudes (-1.7 V, -1.9 V, -2.1 V and -2.3 V). Read voltage for multilevel resistance was 0.2 V.

Fig. 7. Mechanism analysis of Ta/Ta2O5/ZrO2/Pt memristor device. (a) Current fitting results for HRS under different RESET-stop voltages. (b) Linear fit of $\ln \left( I \right)\text{vs}.\sqrt{V}$ in the HRS under RESET-stop voltages of -1.7 V, -1.9 V, -2.1 V, and -2.3 V, respectively. (c) Slope and ϕB vs. RESET-stop voltage. (d) HRS conducting current variations at temperatures from 300 to 380 K. (f) Extracted linear plot of ln(I/T2) versus 1000/T confirms the Schottky emission model for Ta/Ta2O5/ZrO2/Pt memristive device. (g) Schematic energy band diagram of Ta/Ta2O5/ZrO2/Pt memristive device for zero bias condition. (g) The schematic illustration of the RS mechanism of LRS and HRS at different RESET-stop voltages (-1.7 V, -1.9 V, -2.1 V, and -2.3 V) of the proposed Ta/Ta2O5/ZrO2/Pt memristive device.

References 64

[1]	R. Waser, R. Dittmann, G. Staikov, K. Szot, Adv. Mater. 21 (2009) 2632-2663. DOI URL
[2]	F. Pan, S. Gao, C. Chen, C. Song, F. Zeng, Mater. Sci. Eng. R 83 (2014) 1-59. DOI URL
[3]	K.C. Chang, T.C. Chang, T.M. Tsai, R. Zhang, Y.C. Hung, Y.E. Syu, Y.F. Chang, M.C. Chen, T.J. Chu, H.L. Chen, C.H. Pan, C.C. Shih, J.C. Zheng, S.M. Sze, Nanoscale Res. Lett. 10 (2015) 120. DOI URL
[4]	Z. Xu, L. Yu, Y. Wu, C. Dong, N. Deng, X. Xu, J. Miao, Y. Jiang, Sci. Rep. 5 (2015) 10409. DOI URL
[5]	H. Abbas, Y. Abbas, G. Hassan, A.S. Sokolov, Y.R. Jeon, B. Ku, C.J. Kang, C. Choi, Nanoscale 12 (2020) 14120-14134. DOI URL
[6]	G. Niu, M.A. Schubert, S.U. Sharath, P. Zaumseil, S. Vogel, C. Wenger, E. Hilde-brandt, S. Bhupathi, E. Perez, L. Alff, M. Lehmann, T. Schroeder, T. Niermann, Nanotechnology 28 (2017) 215702. DOI URL
[7]	S. Poblador, M.B. Gonzalez, F. Campabadal, Microelectron. Eng. 187-188 (2018) 148-153.
[8]	H. Abbas, A. Ali, J. Jung, Q. Hu, M.R. Park, H.H. Lee, T.-S. Yoon, C.J. Kang, Appl. Phys. Lett. 114 (2019) 093503. DOI URL
[9]	C.-H. Hsu, Y.-S. Fan, P.-T. Liu, Appl. Phys. Lett. 102 (2013) 062905. DOI URL
[10]	K.X. Shi, H.Y. Xu, Z.Q. Wang, X.N. Zhao, W.Z. Liu, J.G. Ma, Y.C. Liu, Appl. Phys. Lett. 111 (2017) 223505. DOI URL
[11]	W. Hu, L. Zou, C. Gao, Y. Guo, D. Bao, J. Alloys Compd. 676 (2016) 356-360. DOI URL
[12]	Y. Wang, Q. Liu, S. Long, W. Wang, Q. Wang, M. Zhang, S. Zhang, Y. Li, Q. Zuo, J. Yang, M. Liu, Nanotechnology 21 (2010) 045202. DOI URL
[13]	J. Wu, C. Ye, J. Zhang, T. Deng, P. He, H. Wang, Mater. Sci. Semicond. Process. 43 (2016) 144-148. DOI URL
[14]	A.S. Sokolov, H. Abbas, Y. Abbas, C. Choi, J. Semicond. 42 (2021) 013101. DOI URL
[15]	T.D. Dongale, A.C. Khot, A.V. Takaloo, K.R. Son, T.G. Kim, J. Mater. Sci. Technol. 78 (2021) 81-91. DOI URL
[16]	Y. Sun, J. Lu, C. Ai, D. Wen, X. Bai, Org. Electron. 32 (2016) 7-14. DOI URL
[17]	M. Ismail, I. Talib, A.M. Rana, E. Ahmed, M.Y. Nadeem, J. Appl. Phys. 117 (2015) 084502. DOI URL
[18]	M. Ismail, E. Ahmed, A.M. Rana, F. Hussain, I. Talib, M.Y. Nadeem, D. Panda, N.A. Shah, ACS Appl. Mater. Interfaces 8 (2016) 6127-6136. DOI URL
[19]	J.C. Wang, C.H. Hsu, Y.R. Ye, C.S. Lai, C.F. Ai, W.F. Tsai, IEEE Electron. Device Lett. 35 (2014) 452-454. DOI URL
[20]	C. Rohde, B.J. Choi, D.S. Jeong, S. Choi, J.-S. Zhao, C.S. Hwang, Appl. Phys. Lett. 86 (2005) 262907. DOI URL
[21]	Y. Zhang, J.X. Shen, S.L. Wang, W. Shen, C. Cui, P.G. Li, B.Y. Chen, W.H. Tang, Appl. Phys. A 109 (2012) 219-222. DOI URL
[22]	Q. Hu, H. Abbas, T.S. Kang, T.S. Lee, N.J. Lee, M.R. Park, T.-S. Yoon, J. Kim, C.J. Kang, Jpn. J. Appl. Phys. 58 (2019) 044001. DOI URL
[23]	H. Abbas, M.R. Park, Y. Abbas, Q. Hu, T.S. Kang, T.-S. Yoon, C.J. Kang, Jpn. J. Appl. Phys. 57 (2018) 06HC03. DOI URL
[24]	Y.C. Chen, Y.L. Chung, B.T. Chen, W.C. Chen, J.S. Chen, J. Phys. Chem. C 117 (2013) 5758-5764. DOI URL
[25]	D. Lee, A.S. Sokolov, B. Ku, Y.-R. Jeon, D. Ho Kim, H. Tae Kim, G. Hwan Kim, C. Choi, Appl. Surf. Sci. 547 (2021) 149140. DOI URL
[26]	M. Qi, Y. Tao, Z. Wang, H. Xu, X. Zhao, W. Liu, J. Ma, Y. Liu, Appl. Surf. Sci. 458 (2018) 216-221. DOI URL
[27]	J. Park, K.P. Biju, S. Jung, W. Lee, J. Lee, S. Kim, S. Park, J. Shin, H. Hwang, IEEE Electron. Device Lett. 32 (2011) 476-478. DOI URL
[28]	M. Ismail, A. Ahmad, K. Mahmood, T. Akbar, A.M. Rana, J. Lee, S. Kim, Appl. Surf. Sci. 483 (2019) 803-810. DOI URL
[29]	A.M. Rana, M. Ismail, T. Akber, M. Younus Nadeem, S. Kim, Mater. Res. Bull. 117 (2019) 41-47. DOI URL
[30]	I.G. Baek, M.S. Lee, S. Sco, M.J. Lee, D.H. Seo, D.-S. Suh, J.C. Park, S.O. Park, H.S. Kim, I.K. Yoo, U.-I. Chung, J.T. Moon, IEDM Tech. Dig. IEEE Int. Electron Devices Meet, IEEE, 2004, pp. 587-590. 2004,.
[31]	A. Chen, S. Haddad, Y.-C. Wu, Tzu-Ning Fang, Zhida Lan, S. Avanzino, S. Pangrle, M. Buynoski, M. Rathor, W. Cai, N. Tripsas, C. Bill, M. Van Buskirk, M. Taguchi, IEEE Int. Devices Meet. (2005) 746-749 2005IEDM Tech. Dig.
[32]	C.Y. Lin, C.Y. Wu, C.Y. Wu, T.C. Lee, F.L. Yang, C. Hu, T.Y. Tseng, IEEE Electron. Device Lett. 28 (2007) 366-368. DOI URL
[33]	M. Ismail, H. Abbas, C. Choi, S. Kim, Appl. Surf. Sci. 529 (2020) 147107. DOI URL
[34]	M. Ismail, M.K. Rahmani, S.A. Khan, J. Choi, F. Hussain, Z. Batool, A.M. Rana, J. Lee, H. Cho, S. Kim, Appl. Surf. Sci. 498 (2019) 143833. DOI URL
[35]	M. Ismail, Z. Batool, K. Mahmood, A. Manzoor Rana, B.-D. Yang, S. Kim, Results Phys 18 (2020) 103275. DOI URL
[36]	S.W. Park, Y.K. Baek, J.Y. Lee, C.O. Park, H.B. Im, J. Electron. Mater. 21 (1992) 635-639.
[37]	H. Abbas, Y. Abbas, M.R. Park, Q. Hu, T.S. Lee, J. Cho, T.-S. Yoon, Y.J. Choi, C.J. Kang, J. Nanosci. Nanotechnol. 17 (2017) 7150-7154. DOI URL
[38]	S. Jin, D. Lee, M. Kwak, A.R. Kim, H. Hwang, H. Cheon, J.-D. Kwon, Y. Kim, Phys. Status Solidi 218 (2021) 2000534.
[39]	J.-H. Ryu, F. Hussain, C. Mahata, M. Ismail, Y. Abbas, M.-H. Kim, C. Choi, B.-G. Park, S. Kim, Appl. Surf. Sci. 529 (2020) 147167. DOI URL
[40]	R.N. Bukke, C. Avis, M.N. Naik, J. Jang, IEEE Electron. Device Lett. 39 (2018) 371-374. DOI URL
[41]	J.L. Colon, D.S. Thakur, C.Y. Yang, A. Clearfield, C.R. Martin, J. Catal. 124 (1990) 148-159. DOI URL
[42]	S. Srivastava, J.P. Thomas, N. Heinig, M. Abd-Ellah, M.A. Rahman, K.T. Leung, Nanoscale 9 (2017) 14395-14404. DOI PMID
[43]	E. Atanassova, D. Spassov, Appl. Surf. Sci. 135 (1998) 71-82. DOI URL
[44]	S.F. Ho, S. Contarini, J.W. Rabalais, J. Phys. Chem. 91 (1987) 4779-4788.
[45]	K.J. Gan, P.T. Liu, T.C. Chien, D.B. Ruan, S.M. Sze, Sci. Rep. 9 (2019) 14141. DOI URL
[46]	C. Yao, W. Hu, M. Ismail, S.K. Thatikonda, A. Hao, S. He, N. Qin, W. Huang, D. Bao, Curr. Appl. Phys. 19 (2019) 1286-1295. DOI URL
[47]	S. Jabeen, M. Ismail, A.M. Rana, E. Ahmed, Mater. Res. Express 4 (2017) 056401. DOI URL
[48]	M. Ismail, S.-U. Nisa, A.M. Rana, T. Akbar, J. Lee, S. Kim, Appl. Phys. Lett. 114 (2019) 012101. DOI URL
[49]	M. Ismail, E. Ahmed, A.M. Rana, I. Talib, M.Y. Nadeem, J. Alloys Compd. 646 (2015) 662-668. DOI URL
[50]	Y. Kim, H. Choi, H.S. Park, M.S. Kang, K.-Y. Shin, S.-S. Lee, J.H. Park, ACS Appl. Mater. Interfaces 9 (2017) 38643-38650. DOI URL
[51]	A. Prakash, H. Hwang, Phys. Sci. Rev. 1 (2016) 20160010.
[52]	T.Y. Wang, J.L. Meng, Q.X. Li, L. Chen, H. Zhu, Q.Q. Sun, S.J. Ding, D.W. Zhang, J. Mater. Sci. Technol. 60 (2021) 21-26. DOI URL
[53]	C. He, Z. Shi, L. Zhang, W. Yang, R. Yang, D. Shi, G. Zhang, ACS Nano 6 (2012) 4214-4221. DOI URL
[54]	X. Zhao, Z. Fan, H. Xu, Z. Wang, J. Xu, J. Ma, Y. Liu, J. Mater. Chem. C 6 (2018) 7195-7200. DOI URL
[55]	Y. Zhang, H. Wu, Y. Bai, A. Chen, Z. Yu, J. Zhang, H. Qian, Appl. Phys. Lett. 102 (2013) 233502. DOI URL
[56]	S. Kim, J. Yang, E. Choi, N. Park, Adv. Funct. Mater. 30 (2020) 2002653. DOI URL
[57]	S. Yu, Y. Wu, H.-S.P. Wong, Appl. Phys. Lett. 98 (2011) 103514. DOI URL
[58]	M. Qi, S. Cao, L. Yang, Q. You, L. Shi, Z. Wu, Appl. Phys. Lett. 116 (2020) 163503. DOI URL
[59]	L. Liu, W. Xiong, Y. Liu, K. Chen, Z. Xu, Y. Zhou, J. Han, C. Ye, X. Chen, Z. Song, M. Zhu, Adv. Electron. Mater. 6 (2020) 1901012. DOI URL
[60]	M. Ismail, C. Mahata, H. Abbas, C. Choi, S. Kim, J. Alloys Compd. 862 (2021) 158416. DOI URL
[61]	J.K. Lee, S. Jung, J. Park, S.W. Chung, J. Sung Roh, S.J. Hong, I. Hwan Cho, H.I. Kwon, C. Hyeong Park, B.-G. Park, J.H. Lee, Appl. Phys. Lett. 101 (2012) 103506. DOI URL
[62]	V.Y.-Q. Zhuo, Y. Jiang, M.H. Li, E.K. Chua, Z. Zhang, J.S. Pan, R. Zhao, L.P. Shi, T.C. Chong, J. Robertson, Appl. Phys. Lett. 102 (2013) 062106. DOI URL
[63]	M. Ismail, I. Talib, A.M. Rana, T. Akbar, S. Jabeen, J. Lee, S. Kim, Nanoscale Res. Lett. 13 (2018) 318. DOI URL
[64]	A. Prakash, J. Park, J. Song, J. Woo, E.-J. Cha, H. Hwang, IEEE Electron. Device Lett. 36 (2015) 32-34. DOI URL

Optimizing the thickness of Ta₂O₅ interfacial barrier layer to limit the oxidization of Ta ohmic interface and ZrO₂ switching layer for multilevel data storage

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