Fig. 1. Fabrication and operation principle of a Si-Au-Si transistor. (a) Illustration of the fabrication of a Si-Au-Si transistor by vertically stacking a Si substrate, a Au base film and a Si membrane. (b) Optical image (scale bar: 20 μm) and SEM image (scale bar: 3 μm) of a Si-Au-Si transistor. (c) Illustration of the cross-section. (d) Energy band diagram and current components of the transistor showing the basic operation mechanism of the device.

Fig. 2. Electrical characteristics of Si-Au-Si, Si-Gr-Ge and Si-Gr-Si transistors. For the Si-Au-Si transistor, (a)-(d) shows the emitter and collector junction characteristics, the input Ie-Ve and transfer Ic-Ve characteristics, the net current Ic’ formed by the collected electrons, and the common base current gain α. (e)-(h) and (i)-(l) show the characteristics of its counterparts of Si-Gr-Ge and Si-Gr-Si transistors.

Fig. 3. Energy band diagrams for (a) Si-Au-Si, (b) Si-Gr-Ge and (c) Si-Gr-Si transistors. Black and red lines are for before and after increasing the bias Vc. When Vc increases, the quantum capacitance effect of graphene will lead to a reduced hot electron energy and a reduced collector barrier height in a Si-Gr-Si transistor.