Abstract: Selector-only memory (SOM) devices have emerged as promising candidates for next-generation memory technologies. Their unique architecture enables cross-point array integration without requiring an external selector, while offering faster operation speeds and lower power consumption compared to conventional storage-class memory (SCM) devices. Despite these advantages, amorphous chalcogenide-based SOM devices face several challenges that hinder commercialization, including poor thermal stability, threshold voltage (V_th) drift, a limited memory window, and degradation in electrical performance. In this study, we address these limitations by systematically investigating charge trapping phenomena based on the Poole-Frenkel conduction mechanism. We also compare the material properties of previously reported chalcogenide compounds to guide the design of a high-performance SOM device. GeS was selected as the active material due to its higher bonding energy and lower trap density compared to GeTe and GeSe. To further enhance device performance, Si doping was employed to suppress unstable S-S homopolar bonds, thereby reinforcing the amorphous network and improving both endurance and the memory window. The resulting Si-doped GeS-based SOM device exhibited excellent endurance (> 2 × 10⁸ cycles) and long retention times (> 10⁷ s), attributed to improved structural integrity through strong Si-S covalent bonding. The reduction in trap density also led to an increased threshold voltage in the RESET state, enabling a wide memory window (ΔV_th ≈ 2.3 V). Moreover, by modulating pulse width (50-500 ns), we successfully demonstrated 2-bit multi-level cell (MLC) operation. These findings highlight that the Si-doped GeS-based SOM device combines low power consumption (≈ 50 pJ/bit), fast switching speed (≈ 100 ns), high endurance, and a wide memory window. This positions it as a strong candidate for next-generation compute express link-based SCM applications.

Key words: Selector-only memory, Ovonic threshold switching, Threshold voltage shift, Poole-Frenkel model, Thermal-assisted hopping, Multilevel operation